# Pci Latency Timer Values in the bios



## mott555

A Google search got me this definition for PCI Latency Timer:

"PCI Latency Timer. Controls how long each PCI device can hold the bus before another takes over. When set to higher values, every PCI device can conduct transactions for a longer time and thus improve the effective PCI bandwidth."

PCI Express is not a shared bus like PCI, so unless you have a true PCI graphics card I would not expect that setting to have any effect on your GPU.


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## NIK1

I have a Liquid cooled ASUS STRIX GTX 980 in my system.


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## NIK1

.


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## mott555

It won't have any effect then. There is at most one device per PCI Express "bus", so the setting does not even make sense in the context of PCI Express. There are not multiple devices on the bus so you can't adjust how long each device gets access to the bus.


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## NIK1

Besides my GTX 980 I have a Samsung 950 Pro SSD on a pci card plugged in also. Does this matter at all.


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## mott555

Is your SSD on a PCI or a PCI Express card? I assume it's PCI Express, and if so then no it doesn't matter. If it's actually PCI, playing with that setting might be dangerous. Just to be clear, PCI and PCI Express are not the same thing, and that setting is for the old plain PCI standard.

For reference, here's a PCI slot:



And here are some PCI Express slots (bottom-most slot is actually PCI and not PCI Express):



PCI is mainly a legacy bus these days, and many modern motherboards don't even include it anymore.


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## NIK1

Its PCI Express 3.0 card.The motherboard slots are PCI Express Gen 3:


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## Blameless

Quote:


> Originally Posted by *mott555*
> 
> It won't have any effect then. There is at most one device per PCI Express "bus", so the setting does not even make sense in the context of PCI Express. There are not multiple devices on the bus so you can't adjust how long each device gets access to the bus.


Yep, this setting doesn't have anything to do with PCI-E.

Setting to to between 64 and 128 was a common fix for shared AGP/PCI busses where 32 cycles wasn't enough for some GPUs or sound cards to complete operations before being grabbed by another device, but it hasn't meant anything for new systems in a long time.
Quote:


> Originally Posted by *NIK1*
> 
> Its PCI Express 3.0 card.The motherboard slots are PCI Express Gen 3:


Chances are this setting won't affect any of your hardware, unless you have an older sound card or something.


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## NIK1

Z97 MPOWER MAX AC motherboard with built in sound. So I just should leave that PCI Latency Timer in the bios at the stock default 32 setting.


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## Blameless

As far as I can tell, there is not a single PCI device on that motherboard and that setting is probably a relic with no function.

The Z97 doesn't even have a PCI bus.

So, yes, no point in changing the setting.


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## NIK1

Thanks for the info...


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## 8051

I remember monkeying w/PCI latency timer values some 16 years ago. I even wrote up a custom x86 protected mode assembly program in TASM to modify them because some AGP video cards back then had values of 255 and grabbed the PCI bus for far too long (which caused problems with NIC's and sound cards).


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## Huzzaa

Shameless ressurection of thread.

Z77 board has this situation looking back at you in the device manager, and I doubt that the naming is wrong.



So here's the question.

Why does it make a signifcant difference in DPC latencies(jumping from default 32 to 64, allows some of the measurement intervals to drop as low as 6 us, with HPET on) 64+ doesn't do much more though. The mouse feels snappier at 32, but more controlled and slower-ish on higher values.(obviously, it sort of makes sense, with some devices having to use more cycles on the bus) but at the same time it feels more controlled.

I personally think, either I'm confused, or the lot of you are confused. The expansions are seemingly built on top of it, the fact you see PCI-E slots only, doesn't seemingly mean anything in this discussion.

Or am I wrong, please enlighten this situation a bit more, someone who actually knows about it.

Because the argument of it being a "relic" in the BIOS settings makes absolutely zero sense for it to be in there on a motherboard that has no PCI slots.

Thinking further, this BIOS code is likely shared among GD55 and others boards such as the G45, which I have as well in my 2nd PC, and none of them have any PCI slots in them, yet the setting is present in all of them.


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## 8051

According to the block diagram for the Z97 chipset there is a PCIe to PCI bridge hung off the Z97 PHC:

Motherboard Block Diagram - Gigabyte G1.Sniper Z97 User Manual [Page 8]

The PS2 inputs are handled off the Super I/O chip which is hung off an LPC bus which is in turn hung off the Z97 PHC, the LPC bus might use PCI latency timers.

The PCI latency timers might even be there just for the purposes of legacy software because the PCI Express 3.0 base specification requires adherence to a PCI 3.0 Compatible Configuration Mechanism:



http://composter.com.ua/documents/PCI_Express_Base_Specification_Revision_3.0.pdf



As others have said PCI latency timers are irrelevant in the PCI Express world, because PCI Express lanes are point-to-point and unshared.


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## mott555

At the software/driver level, PCI Express is fully compatible with PCI, which is why it may show up as a PCI Bus in Device Manager. At the hardware level though, they are two completely different and incompatible things.

For example my company produces both PCI and PCI Express variants of specialty hardware. I deal a lot with writing kernel-mode device drivers for them. I do not have to think about whether it's PCI or PCI Express because they show up exactly the same to software. I'm not sure if the operating system can even tell the difference between the two, I can only tell by parsing a part number from the device's registers in the driver code.


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## 8051

Quote:


> Originally Posted by *mott555*
> 
> At the software/driver level, PCI Express is fully compatible with PCI, which is why it may show up as a PCI Bus in Device Manager. At the hardware level though, they are two completely different and incompatible things.
> 
> For example my company produces both PCI and PCI Express variants of specialty hardware. I deal a lot with writing kernel-mode device drivers for them. I do not have to think about whether it's PCI or PCI Express because they show up exactly the same to software. I'm not sure if the operating system can even tell the difference between the two, I can only tell by parsing a part number from the device's registers in the driver code.


What about the bridged/switched PCIe bus in the Z97 chipset (which is how they get two PCIe 8 connectors)? Is the bridge/switch completely transparent to software? Or what about the PCIe bus that's hung off the PCH?


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## mott555

It's all completely transparent to software (or is supposed to be, anyway). There are some rare architectures that require you to discover any bridge chips in software and directly enumerate their buses to discover devices attached to it. That gets really messy on high-slot systems that have bridge chips connected to bridge chips connected to bridge chips...fortunately these are specialty systems that are hardly ever found outside certain niche tech markets. Average consumer/business PCs have a ton of black magic going on at the chipset level to hide just how complex it really is, and I never have to think about bridges, switches, PCI Express or PCI, whether the device is plugged into the CPU or the southbridge, etc.


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## pensador.cyber

Boa tarde, a minha placa é um ax99 rs9 da machinist, e a minha placa de video é uma asus 1050ti 4g 128bts. Gostaria de saber se eu posso aumentar os valores da pci latenciy time de 32 para 64 e 64 para 128.


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