# enable clock to all dimms?



## denn_is

please forgive my slowness but can anyone tell me what the hell these do?









i have this setting in my bios.

1:enable clock to all dimms = what is this?

2:memclk tristate = what is this?

3:dct unganged mode =what is this?

4:memory hole remapping? or some thing like that.

just need to know what this stuff dose.my old board was very light (junk) on the OC settings.









thanks
Dennis


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## glussier

Quote:

1:enable clock to all dimms = what is this?
No clue

Quote:

2:memclk tristate = what is this?
Someone else might be able to reply.

Quote:

3:dct unganged mode =what is this?
ganged mode joins the 2 64bit memory controllers to be used as 1 128 memory controller. The theoritical bandwidth might look better for ganged mode under benchmarks such as Sisoft Sandra or Everest, but in the real multitasking world, it might be better to use unganged (2 fast 64bit memory controllers running independently.

Quote:

4:memory hole remapping? or some thing like that.
Reorganize the ram in such a way, that a 64bit operating system will give access to all 4gB of ram.


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## coonsaa

bump as I have same questions for the top 2 lol


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## gerikoh

the 1st one, is setting the clocks speeds of all the ram as one, so you won't have to configure each ram, one by one.

i haven't got a single clue about the 2nd.

3rd is the way of handling ram. unganged is 2x64bit dual channel, and unganged is 1x128bit dual channel. unganged is best for dual-channel configuration, and ganged is for single channel.

i'm not sure about the 4th one


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## ronnin426850

Bump.
I might also add a question about Bank and Channel interleaving. As far as I read on forums, it improves performance. Why is it all off by default? Also MemClk Tristate - still got no idea what it is. And I think the Q about Enable Clock to all DIMMS stays open, cause you actually never set clock separately anyway. Shoud be something else..


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## ronnin426850

1 year later Bump.
Quote:


> Originally Posted by *ronnin426850;10830337*
> Bump.
> I might also add a question about Bank and Channel interleaving. As far as I read on forums, it improves performance. Why is it all off by default? Also MemClk Tristate - still got no idea what it is. And I think the Q about Enable Clock to all DIMMS stays open, cause you actually never set clock separately anyway. Shoud be something else..


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## mdocod

1. Enable clock to all dimms:
(from the PDF of my mobo manual): "This item determines whether the BIOS should actively reduce EMI (Electromagn etic Interference) and reduce power consumption by turning off unoccupied or inactive DIMM slots."
Other respondents have this option mixed up with something that is sometimes called "DRAM Timing Mode," which is the option that allows you to select auto timing, or manual timing options via DCT0, DCT1, or BOTH.

2:memclk tristate:
I'm under the impression that when this is enabled, the dimms can be put in a low-power-state while the computer is suspended/sleeping. There may be more to this, hard to find good information about it.

3:dct unganged mode:
While others have explained this fairly well, the more important point to be made, is that unganged operation allows dual channel support even on dimms of unequal capacity when possible.

4:memory hole remapping:
(Again from the PDF of my mobo manual): "This item allows you to enable or disable the remapping of the overlapped PCI memory above the total physical memory. Only 64-bit OS supports this function."
I have no reason to believe this has anything to do with being able to address more than 3GB of RAM.

5: Bank Interleaving:
http://www.realworldtech.com/page.cfm?ArticleID=RWT110401204523&p=1

6: Channel Interleaving:
(from: http://www.hardwarecanucks.com/forum/ram/36978-channel-interleave.html )"Channel Interleave: Channel Interleave: Higher values divide memory blocks and spread contiguous portions of data across interleaved channels, thereby increasing potential read bandwidth as requests for data can be made to all interleaved channels in an overlapped manner. For benchmarking purposes when using three memory modules, a 4-way interleave may surpass the scoring performance of setting 6-way interleave depending on the benchmark and operating system used (32-bit vs. 64-bit). We did find however that a 6-way interleave was capable of a higher overall BCLK for Super PI 32M than using a 4-way interleave setting (unless of course you run single- or dual-channel and appropriate channel interleaving thus decreasing load upon the memory controller)."


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## ronnin426850

Quote:


> Originally Posted by *mdocod;15030005*
> 1. Enable clock to all dimms:
> (from the PDF of my mobo manual): "This item determines whether the BIOS should actively reduce EMI (Electromagn etic Interference) and reduce power consumption by turning off unoccupied or inactive DIMM slots."
> Other respondents have this option mixed up with something that is sometimes called "DRAM Timing Mode," which is the option that allows you to select auto timing, or manual timing options via DCT0, DCT1, or BOTH.
> 
> 2:memclk tristate:
> I'm under the impression that when this is enabled, the dimms can be put in a low-power-state while the computer is suspended/sleeping. There may be more to this, hard to find good information about it.
> 
> 3:dct unganged mode:
> While others have explained this fairly well, the more important point to be made, is that unganged operation allows dual channel support even on dimms of unequal capacity when possible.
> 
> 4:memory hole remapping:
> (Again from the PDF of my mobo manual): "This item allows you to enable or disable the remapping of the overlapped PCI memory above the total physical memory. Only 64-bit OS supports this function."
> I have no reason to believe this has anything to do with being able to address more than 3GB of RAM.
> 
> 5: Bank Interleaving:
> http://www.realworldtech.com/page.cfm?ArticleID=RWT110401204523&p=1
> 
> 6: Channel Interleaving:
> (from: http://www.hardwarecanucks.com/forum/ram/36978-channel-interleave.html )"Channel Interleave: Channel Interleave: Higher values divide memory blocks and spread contiguous portions of data across interleaved channels, thereby increasing potential read bandwidth as requests for data can be made to all interleaved channels in an overlapped manner. For benchmarking purposes when using three memory modules, a 4-way interleave may surpass the scoring performance of setting 6-way interleave depending on the benchmark and operating system used (32-bit vs. 64-bit). We did find however that a 6-way interleave was capable of a higher overall BCLK for Super PI 32M than using a 4-way interleave setting (unless of course you run single- or dual-channel and appropriate channel interleaving thus decreasing load upon the memory controller)."


Thank you! Man, where were you 1 year ago?







Rep+


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